Welcome to Department of

Dr. Manoj Kumar

Assistant Professor
Electronics And Communication Engineering

Email: [email protected]

Dr. Manoj Kumar is currently working as an Assistant Professor in Department of Electronics & Communication  Engineering, National Institute of Technology, Manipur. Having completed his B.Tech Degree from NIT Calicut , and MTECH degree from Indian Institute of Information Technology (IIIT), Allahabad, he started working as an Assitant Professor in NIT Manipur and received his PhD degree from National Institute of Technology Manipur.

 

He has  published several research articles in national and international reputed journals and attended various conferences across India.His Research Area includes VLSI design,VLSIDSP, Digital Electronics and Communications. He has published over 45 scientific articles in International, National journals of repute and in several conferences.

Paper Published

2025:  

H. Bharat Meitei and M. Kumar, "Design and Implementation of Multiple Ring Oscillator-Based TRNG Architecture by Using ADPLL," in IEEE Access, vol. 13, pp. 9252-9264, 2025, doi: 10.1109/ACCESS.2025.3527507.

Ngaomei, Ringchamdinliu, and Manoj Kumar. "FPGA implementation of low power and automatic traffic light control system." AIP Conference Proceedings. Vol. 3298. No. 1. AIP Publishing LLC, 2025.

Meitei, H.B., Kumar, M.FPGA design and implementation of TRNG architecture usingADPLL based on fir as loop filter. Analog Integr Circ Sig Process 122, 2 (2025).https://doi.org/10.1007/s10470-024-02295-8.

2025

 

2025

 

2025

2024:  

Kumar, M. Development of an Automatic and Secure Car Parking System for Office User,Technische Sicherheit, 24, 8(2024).

Kumar, M. VLSI Implementation of ECG data Compression and Decompression usingDifferential Encoding Method, Technische Sicherheit,24,3,(2024).

Kumar, M., Design and Implementation of Digital Low Pass FIR and IIR Filters UsingVHDL for ECG Denoising, International Journal of Engineering Trends and Technology, 72,1, (2024).

Meitei, H.B., Kumar, M. FPGA-Based True Random Number Generator Architecture Using15-Bit LFSR and ADPLL. In: Swain, B.P., Dixit, U.S. (eds) Recent Advances in Electricaland Electronic Engineering. ICSTE 2023. Lecture Notes in Electrical Engineering, vol 1071.Springer, Singapore, 2024.https://doi.org/10.1007/978-981-99-4713-3_27.

2024

 

2024

2024

 

2024

2023:  
Kumar, M., Design and Implementation of VGA based ATM system using FPGA,Technische Sicherheit, 23, 11(2023).  
2022:  

Singh,ch. Sh., Kumar, M. design and implementation of secured wireless communicationbased fire detection system, International Journal of Early Childhood Special Education(INT-JECSE),14,8(2022).

Devi,Bh.N., Kumar, M. fpga implementation of four-lift control system with smokedetection, International Journal of Early Childhood Special Education (INT-JECSE),14,8(2022).Meitei, H.B., Kumar, M. FPGA Implementation of a Wireless Communication System forSecure IR Sensor Data Transmission using TRNG, International Journal of EngineeringTrends and Technology, 70,7(2022).

Singh,C.Th., Kumar, M. Design and implementation of two-dimensional digital finiteimpulse response filter using very high speed integrated circuit hardware descriptionlanguage, International Journal of Electrical and Computer Engineering (IJECE),12,4(2022).


Kumar, M.,Singh,D.Th., design and implementation of unidirectional visitor counter usingbluetooth and fpga, International Journal of Early Childhood Special Education (INT-JECSE),14,3(2022).


Kumar, M., Jayalaxmi,A., Malemnganbi,W., Design and Implementation of Secured CarParking System using FPGA, International Journal of Applied EngineeringResearch,17,3(2022).

Meitei, H., Kumar, M. FPGA implantations of TRNG architecture using ADPLL based onFIR filter as a loop filter. SN Appl. Sci. 4, 96 (2022). https://doi.org/10.1007/s42452-022-04981-6.

2022

 

2022

 

 

2022

 

2022

 

2022

 

2022

2020:

 

M. Kumar. and Roel, D.D., Design and implementation of higher order sigma delta modulator circuits using FPAA. Analog Integr Circ Sig Process 104169–182 (2020). https://doi.org/10.1007/s10470-020-01667-0

2020

  • M. Kumar and   Edison Kho,Design and Implementation of FPGA based Vending Machine for Integrated Circuit (IC),  International Conference on Communication and Signal Processing (ICCSP),IEEE,July,2020.

 

2020

2019:

 

M. Kumar and  Karni Ram, Implementation of Word Level Parallel Processing Unfolding Algorithm using VHDL,IJEAT,Vol.8,no.6,2019.

2019

  • M. Kumar and   Jacinta Potsangbam ,Design And Implementation of Combined Pipelining and Parallel Processing Architecture for FIR and IIR Filters Using VHDL, International Journal of VLSI Design and Communication Systems ,Vol.10,No.4,2019.

2019

  • M. Kumar, Design of IIR Systolic Array Architecture by using Linear Mapping Technique, International Journal of Computer Applications, Vol.18, No.39, 2019.
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2019

2018:

 

M. Kumar and K. M. Singh, Retrieval of head–neck medical images using Gabor filter based onpower-law transformation method and rank BHMT, Signal, Image and Video Processing (Springer), 12(5), 827-833, 2018.

 

2018

M. Kumar and K.M. Singh, Retrieval of X-ray Images Using Scale Invariant Feature Transform and Combination of Region and Elliptic Fourier Descriptors Feature, Journal of Medical Imaging and Health informatics, 8, 747-782, 2018.

2018

  • M. Kumar and K.M. Singh, Content Based Medical Image Retrieval System (CBMIRS) to Diagnose Hepatobiliary Images, International Conference on Smart and Innovative Trends in Next Generation Computing Technologies,2018.

 

2018

2017:

 

  • M. Kumar and K.M. Singh, Content Based Medical Image Retrieval System Using Sift And Hu-Moment For Hepatobiliary Images, Journal of Engineering and Applied Sciences, Vol.12, No.11, 2017.

 

2017

  • M. Kumar and Beauti Khataniar , VHDL Implementation of NOC Architecture for UART Using Round Robin Arbiter,  International Conference on Computational Intelligence, Communications, and Business Analytics, September 2017.

 

2017

  • M. Kumar and L Kholee Phimu , Design and implementation of area efficient 2-parallel filters on FPGA using image system, International Conference on Energy, Communication, Data Analytics and Soft Computing (ICECDS),august 2017.

 

2017

  • M. Kumar and Terirama Thingujam, TCAD based modeling and simulation of Graphene Nanostructured FET (GFET) for High Frequency Performance, ADBU Journal of Engineering Technology (AJET) ,Vol.6,No.1,2017.
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2017

  • M. Kumar and Abhishek Kumar Chaudhary , Design and implementation of ADPLL for Digital communication applications, 2nd International Conference for Convergence in Technology (I2CT),2017.

 

2017

  • M. Kumar and Terirama Thingujam, Study and design of graphene field effect transistor for RF performance, International Conference on Inventive Communication and Computational Technologies (ICICCT),2017.

 

2017

2016:

 

  • M. Kumar and L Kholee Phimu, VLSI Implementation of Area Efficient 2-Parallel FIR Digital Filter, International Journal of VLSI Design and Communication Systems, Vol.7,No.5/6,2016.

 

2016

M. Kumar and K.M. Singh, Content Based Medical Image Retrieval System Using DWT and LBP for Ear Images, IJ C T A, Vol.9,No.40, 2016

2016

M. Kumar and K.M. Singh, Content Based Medical Image Retrieval System using Fourier Descriptors Feature for Nose Images, SSRG International Journal of Electronics and Communication Engineering (SSRG-IJECE) – Volume 3 Issue 12 – December 2016

2016

M. Kumar and K.M. Singh, Content Based Medical Image Retrieval Using Texture and Intensity For eye Images, International Journal of Scientific & Engineering Research, Volume 7, No.9, 2016.

2016

M. Kumar and Mohd.Azharuddin, An Improved Novel 64-Bit QCA Adder, Vol. 5, Issue 3, March 2016

2016

M. Kumar and Aribam Balarampyari Devi, Design and Implementation of an Improved Carry Increment Adder, International Journal of VLSI design & Communication Systems (VLSICS) Vol.7, No.1, February 2016.

2016

Academic Information

 

Academic Information 

B.TECH

Electronics and Communication Engineering,  NIT Calicut

NIT Calicut

M.TECH

Microelectronics, Indian Institute of Information Technology (IIIT), Allahabad

Indian Institute of Information Technology (IIIT), Allahabad

PhD

Department of Electronics and Communication Engineering

National Institute of Technology Manipur

 

Subjects Taught:

B.Tech

1. Signal & Systems

2. HDL & High Level VLSI Design

3. VHDL

4. Biomedical Instrumentation

M.TECH

1. Analog & Digital CMOS IC Design

2. VLSI DSP

PhD Course Work

1.FPGA Design

2. Design of Digital Systems

3. Analog & Digital CMOS IC Design

4. VLSI DSP

 

PhD Guided/Guiding

Scholar Name

Status of PHD

Registration Year

Thingujam Churchil Singh

Undergoing

2019

Manish Kumar

Undergoing

2019

Bharat Metei

Undergoing

2020

Rosy Haokip

Undergoing

2020


Other Activity Information

 

Project Guided

  1. B. Tech. : 24 student guided
  2. M.Tech.  : 18 student guided